[pwrmgr, top_darjeeling] Take external SoC reset into account in FSM #22575
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Razer6
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This was referenced Apr 18, 2024
1. Internally generated reset request passed to SoC. 2. Create a sticky assertion internally to log request. Sticky flag cleared only upon external reset deassertion. 3. SoC transfers this request to platform to assert external reset. 4. External SoC reset deasserts after some time. 5. Pwrmgr stays in FastPwrStateRstWait state until the external SoC reset deasserts. 6. Boot / reset sequence continues. 7. Also fixes the external reset signal glitch filter to use the por reset. This is required to make sure that the external reset state does not self-reset once asserted and faithfully forwards that state to pwrmgr. 8. Added some debug visibility signals for pwrmgr. 9. Added temporary reset loop back path in pwrmgr TB to translate internal reset req from OT --> ext reset from SoC to OT. Needs a proper fix in testbench (issue lowRISC#22710). Signed-off-by: Neeraj Upasani <[email protected]>
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CHANGE AUTHORIZED: hw/ip/pwrmgr/rtl/pwrmgr.sv |
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Sticky flag cleared only upon external reset deassertion.
reset deasserts.
reset. This is required to make sure that the external reset state
does not self-reset once asserted and faithfully forwards that state
to pwrmgr.
internal reset req from OT --> ext reset from SoC to OT. Needs a
proper fix in testbench (issue [pwrmgr, top_darjeeling] Model external reset request in block- and top-level DV #22710).